Specifications
| Type | Description |
|---|---|
| Part Number | SN74LVC2T45DCTR |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | DCT (SM8, 8-pin), 2.95 mm × 4 mm |
| Function | Dual-bit noninverting dual-supply bus transceiver with configurable voltage translation; general description |
| A-port supply voltage range | 1.65 to 5.5 V; VCCA recommended operating condition |
| B-port supply voltage range | 1.65 to 5.5 V; VCCB recommended operating condition |
| Direction input reference supply | VCCA; DIR input circuit referenced to VCCA |
| VCC isolation behavior | Both ports high-impedance when either VCC input is at GND; VCC isolation feature |
| Maximum ICC | 4 µA; ICCA + ICCB, VI = VCCI or GND, IO = 0, VCCA/VCCB = 1.65 V to 5.5 V |
| Partial-power-down support | Ioff circuitry disables outputs to prevent current backflow; partial-power-down applications |
| Maximum data rate | 420 Mbps; 3.3-V to 5-V translation |
| Maximum data rate | 210 Mbps; translate to 3.3 V |
| Maximum data rate | 140 Mbps; translate to 2.5 V |
| Maximum data rate | 75 Mbps; translate to 1.8 V |
| Output drive current | ±24 mA; at 3.3 V |
| Latch-up performance | >100 mA; per JESD 78, Class II |
| HBM ESD rating | ±4000 V; human-body model, ANSI/ESDA/JEDEC JS-001 / JESD 22 A114-A |
| CDM ESD rating | ±1000 V; charged-device model, ANSI/ESDA/JEDEC JS-002 / JESD 22 C101 |
| Supply voltage absolute maximum | -0.5 to 6.5 V; VCCA and VCCB, over operating free-air temperature range |
| Input voltage absolute maximum | -0.5 to 6.5 V; VI |
| High-impedance or power-off output voltage absolute maximum | -0.5 to 6.5 V; VO applied to any output in high-impedance or power-off state |
| Output voltage absolute maximum, active A port | -0.5 V to VCCA + 0.5 V; VO applied to any output in high or low state |
| Output voltage absolute maximum, active B port | -0.5 V to VCCB + 0.5 V; VO applied to any output in high or low state |
| Input clamp current | -50 mA; VI < 0 V |
| Output clamp current | -50 mA; VO < 0 V |
| Continuous output current | -50 to 50 mA; IO |
| Continuous current through VCC or GND | -100 to 100 mA; absolute maximum rating |
| Junction temperature absolute maximum | 150 °C; TJ |
| Storage temperature range | -65 to 150 °C; Tstg |
| Data input VIH | VCCI × 0.65 min; VCCI = 1.65 V to 1.95 V |
| Data input VIH | 1.7 V min; VCCI = 2.3 V to 2.7 V |
| Data input VIH | 2.0 V min; VCCI = 3.0 V to 3.6 V |
| Data input VIH | VCCI × 0.7 min; VCCI = 4.5 V to 5.5 V |
| Data input VIL | VCCI × 0.35 max; VCCI = 1.65 V to 1.95 V |
| Data input VIL | 0.7 V max; VCCI = 2.3 V to 2.7 V |
| Data input VIL | 0.8 V max; VCCI = 3.0 V to 3.6 V |
| Data input VIL | VCCI × 0.3 max; VCCI = 4.5 V to 5.5 V |
| DIR input VIH | VCCA × 0.65 min; VCCA = 1.65 V to 1.95 V |
| DIR input VIH | 1.7 V min; VCCA = 2.3 V to 2.7 V |
| DIR input VIH | 2.0 V min; VCCA = 3.0 V to 3.6 V |
| DIR input VIH | VCCA × 0.7 min; VCCA = 4.5 V to 5.5 V |
| DIR input VIL | VCCA × 0.35 max; VCCA = 1.65 V to 1.95 V |
| DIR input VIL | 0.7 V max; VCCA = 2.3 V to 2.7 V |
| DIR input VIL | 0.8 V max; VCCA = 3.0 V to 3.6 V |
| DIR input VIL | VCCA × 0.3 max; VCCA = 4.5 V to 5.5 V |
| Input voltage recommended range | 0 to 5.5 V; VI |
| Output voltage recommended range | 0 to VCCO V; VO |
| High-level output current | -4 mA; VCCO = 1.65 V to 1.95 V |
| High-level output current | -8 mA; VCCO = 2.3 V to 2.7 V |
| High-level output current | -24 mA; VCCO = 3.0 V to 3.6 V |
| High-level output current | -32 mA; VCCO = 4.5 V to 5.5 V |
| Low-level output current | 4 mA; VCCO = 1.65 V to 1.95 V |
| Low-level output current | 8 mA; VCCO = 2.3 V to 2.7 V |
| Low-level output current | 24 mA; VCCO = 3.0 V to 3.6 V |
| Low-level output current | 32 mA; VCCO = 4.5 V to 5.5 V |
| Input transition rise or fall rate | 20 ns/V max; data inputs, VCCI = 1.65 V to 2.7 V |
| Input transition rise or fall rate | 10 ns/V max; data inputs, VCCI = 3.0 V to 3.6 V |
| Input transition rise or fall rate | 5 ns/V max; data inputs, VCCI = 4.5 V to 5.5 V; control input VCCI = 1.65 V to 5.5 V |
| Operating free-air temperature | -40 to 85 °C; TA |
| VOH | VCCO - 0.1 V min; IOH = -100 µA, VCCA/VCCB = 1.65 V to 4.5 V, -40°C to +85°C |
| VOH | 1.2 V min; IOH = -4 mA, VCCA = 1.65 V, VCCB = 1.65 V |
| VOH | 1.9 V min; IOH = -8 mA, VI = VIH, VCCA = 2.3 V, VCCB = 2.3 V |
| VOH | 2.4 V min; IOH = -24 mA, VCCA = 3 V, VCCB = 3 V |
| VOH | 3.8 V min; IOH = -32 mA, VCCA = 4.5 V, VCCB = 4.5 V |
| VOL | 0.1 V max; IOL = 100 µA, VCCA/VCCB = 1.65 V to 4.5 V |
| VOL | 0.45 V max; IOL = 4 mA, VCCA = 1.65 V, VCCB = 1.65 V |
| VOL | 0.3 V max; IOL = 8 mA, VI = VIL, VCCA = 2.3 V, VCCB = 2.3 V |
| VOL | 0.55 V max; IOL = 24 mA, VCCA = 3 V, VCCB = 3 V |
| VOL | 0.55 V max; IOL = 32 mA, VCCA = 4.5 V, VCCB = 4.5 V |
| DIR input leakage current | ±1 µA typ, ±2 µA max; II, VI = VCCA or GND, VCCA/VCCB = 1.65 V to 5.5 V |
| Power-off leakage current | ±1 µA typ, ±2 µA max; Ioff, A port VCCA = 0 V, VCCB = 0 to 5.5 V, VI or VO = 0 to 5.5 V |
| Power-off leakage current | ±1 µA typ, ±2 µA max; Ioff, B port VCCA = 0 to 5.5 V, VCCB = 0 V, VI or VO = 0 to 5.5 V |
| High-impedance output leakage current | ±1 µA typ, ±2 µA max; IOZ, A or B port, VO = VCCO or GND, VCCA/VCCB = 1.65 V to 5.5 V |
| DIR input capacitance | 2.5 pF typ; CI, VI = VCCA or GND, VCCA = 3.3 V, VCCB = 3.3 V |
| A or B port I/O capacitance | 6 pF typ; Cio, VO = VCCA/B or GND, VCCA = 3.3 V, VCCB = 3.3 V |
| Junction-to-ambient thermal resistance | 195.3 °C/W; DCT package, 8 pins |
| Junction-to-case top thermal resistance | 106 °C/W; DCT package, 8 pins |
| Junction-to-board thermal resistance | 110.8 °C/W; DCT package, 8 pins |
| Pin 1 | VCCA; DCT/DCU package pin function, A-port supply voltage |
| Pin 2 | A1; DCT/DCU package pin function, input/output A1 referenced to VCCA |
| Pin 3 | A2; DCT/DCU package pin function, input/output A2 referenced to VCCA |
| Pin 4 | GND; DCT/DCU package pin function |
| Pin 5 | DIR; DCT/DCU package pin function, direction control signal |
| Pin 6 | B2; DCT/DCU package pin function, input/output B2 referenced to VCCB |
| Pin 7 | B1; DCT/DCU package pin function, input/output B1 referenced to VCCB |
| Pin 8 | VCCB; DCT/DCU package pin function, B-port supply voltage |
| Datasheet Status | request_only |
Product Overview
The SN74LVC2T45DCTR is a Texas Instruments dual-bit noninverting dual-supply bus transceiver for configurable voltage translation. The A port is supplied by VCCA and the B port by VCCB, with both supplies specified for 1.65 to 5.5 V recommended operation. The direction input is referenced to VCCA and controls the signal direction between the two ports.
The device includes VCC isolation, placing both ports in a high-impedance state when either VCC input is at GND. Ioff circuitry supports partial-power-down applications by disabling outputs to prevent current backflow. Low-power operation is specified with ICCA + ICCB up to 4 µA under the stated no-load condition.
Performance depends on translation level: maximum data rate is 420 Mbps for 3.3-V to 5-V translation, 210 Mbps when translating to 3.3 V, 140 Mbps when translating to 2.5 V, and 75 Mbps when translating to 1.8 V. The DCT package is an 8-pin SM8 body measuring 2.95 mm × 4 mm, with defined VCCA, A1, A2, GND, DIR, B2, B1, and VCCB pins.
Key Features
- Dual-bit noninverting dual-supply bus transceiver
- Configurable voltage translation between A and B ports
- VCCA and VCCB operate from 1.65 to 5.5 V
- DIR input circuit referenced to VCCA
- Both ports high-impedance when either VCC is grounded
- Ioff circuitry prevents partial-power-down current backflow
- Maximum ICC is 4 µA under no-load conditions
- 420 Mbps maximum for 3.3-V to 5-V translation
- ±24 mA output drive current at 3.3 V
- ±4000 V HBM and ±1000 V CDM ESD ratings
Typical Applications
- Dual-supply bus translation
- Logic-level voltage translation
- Partial-power-down signal paths
- 1.8 V to higher-voltage interfaces
- 2.5 V and 3.3 V translation
- Bidirectional two-bit digital interfaces
- High-impedance isolation during power loss
Procurement Notes
When requesting a quote for SN74LVC2T45DCTR, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What type of device is SN74LVC2T45DCTR?
SN74LVC2T45DCTR is a Texas Instruments dual-bit noninverting dual-supply bus transceiver with configurable voltage translation. It provides A-port and B-port I/O referenced to separate VCCA and VCCB supplies.
What supply voltages does SN74LVC2T45DCTR support?
Both the A-port supply VCCA and B-port supply VCCB have recommended operating ranges of 1.65 to 5.5 V. The DIR input circuit is referenced to VCCA.
What happens when one supply is at ground?
The VCC isolation feature places both ports in a high-impedance state when either VCC input is at GND. The device also includes Ioff circuitry to prevent current backflow in partial-power-down applications.
What data rates are specified for voltage translation?
The specified maximum data rate is 420 Mbps for 3.3-V to 5-V translation, 210 Mbps when translating to 3.3 V, 140 Mbps when translating to 2.5 V, and 75 Mbps when translating to 1.8 V.
What package and pinout does this part use?
SN74LVC2T45DCTR uses the DCT SM8 8-pin package measuring 2.95 mm × 4 mm. Pins are VCCA, A1, A2, GND, DIR, B2, B1, and VCCB.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.