Specifications
| Type | Description |
|---|---|
| Part Number | TPS51200 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Component Type | Power_IC |
| Package Case | 10-pin VSON (DRC), 3.00 mm x 3.00 mm body |
| Input Supply Support | 2.5 V rail and 3.3 V rail; condition: VIN input |
| VLDOIN Voltage Range | 1.1 V to 3.5 V; condition: Feature specification |
| Minimum Output Capacitance | 20 uF minimum; typically 3 x 10 uF MLCCs for DDR termination applications |
| REFOUT Buffered Reference Current | +/-10 mA; condition: Buffered reference output |
| Supported Memory Standards | DDR, DDR2, DDR3, DDR3L, low-power DDR3, DDR4; condition: VTT bus termination applications |
| Operating Temperature Range | -40 C to +85 C; condition: Specified operating range |
| Package | VSON, 10 pins, 3.00 mm x 3.00 mm; condition: Device information table |
| VIN Pin Requirement | 1 uF to 4.7 uF ceramic decoupling capacitor required; condition: VIN pin, 2.5 V or 3.3 V power supply |
| REFOUT Pin Capacitance | Below 0.47 uF total; condition: If REFOUT capacitors exist at DDR side; REFOUT cannot be open |
| Absolute Maximum Input Voltage | -0.3 V to 3.6 V; condition: REFIN, VIN, VLDOIN, VOSNS |
| Absolute Maximum EN Voltage | -0.3 V to 6.5 V; condition: EN input |
| Absolute Maximum PGND to GND Voltage | -0.3 V to 0.3 V; condition: PGND with respect to GND |
| Absolute Maximum Output Voltage | -0.3 V to 3.6 V; condition: REFOUT, VO |
| Absolute Maximum PGOOD Voltage | -0.3 V to 6.5 V; condition: PGOOD output |
| Operating Junction Temperature | -40 C to 150 C; condition: Absolute maximum ratings |
| Storage Temperature | -55 C to 150 C; condition: Absolute maximum ratings |
| ESD Rating HBM | +/-2000 V; condition: ANSI/ESDA/JEDEC JS-001 |
| ESD Rating CDM | +/-500 V; condition: JEDEC JESD22C101 |
| Recommended VIN Supply Voltage | 2.375 V min, 3.500 V max; condition: Recommended operating conditions |
| Recommended EN Voltage | -0.1 V min, 3.5 V max; condition: Recommended operating conditions |
| Recommended VLDOIN Voltage | -0.1 V min, 3.5 V max; condition: Recommended operating conditions |
| Recommended VOSNS Voltage | -0.1 V min, 3.5 V max; condition: Recommended operating conditions |
| Recommended REFIN Voltage | 0.5 V min, 1.8 V max; condition: Recommended operating conditions |
| Recommended PGOOD Voltage | -0.1 V min, 3.5 V max; condition: Recommended operating conditions |
| Recommended VO Voltage | -0.1 V min, 3.5 V max; condition: Recommended operating conditions |
| Recommended REFOUT Voltage | -0.1 V min, 1.8 V max; condition: Recommended operating conditions |
| Recommended PGND Voltage | -0.1 V min, 0.1 V max; condition: Recommended operating conditions |
| Recommended Free-Air Operating Temperature | -40 C min, 85 C max; condition: Recommended operating conditions |
| Junction-to-Ambient Thermal Resistance | 84.6 C/W; condition: DRC VSON, 10 pins |
| Junction-to-Case Top Thermal Resistance | 55.6 C/W; condition: DRC VSON, 10 pins |
| Junction-to-Board Thermal Resistance | 30.0 C/W; condition: DRC VSON, 10 pins |
| Junction-to-Top Characterization Parameter | 5.5 C/W; condition: DRC VSON, 10 pins |
| Junction-to-Board Characterization Parameter | 30.1 C/W; condition: DRC VSON, 10 pins |
| Junction-to-Case Bottom Thermal Resistance | 10.9 C/W; condition: DRC VSON, 10 pins |
| Supply Current | 0.7 mA typ, 1 mA max; condition: TA=25 C, VEN=3.3 V, no load |
| Shutdown Current | 65 uA typ, 80 uA max; condition: TA=25 C, VEN=0 V, VREFIN=0 V, no load |
| Shutdown Current | 200 uA typ, 400 uA max; condition: TA=25 C, VEN=0 V, VREFIN > 0.4 V, no load |
| VLDOIN Supply Current | 1 uA typ, 50 uA max; condition: TA=25 C, VEN=3.3 V, no load |
| VLDOIN Shutdown Current | 0.1 uA typ, 50 uA max; condition: TA=25 C, VEN=0 V, no load |
| REFIN Input Current | 1 uA; condition: VEN=3.3 V |
| VO Output DC Voltage Error | -15 mV min, 15 mV max; condition: VREFOUT=1.25 V DDR1, IO=0 A |
| VO Output DC Voltage Error | -15 mV min, 15 mV max; condition: VREFOUT=0.9 V DDR2, IO=0 A |
| VO Output DC Voltage Error | -15 mV min, 15 mV max; condition: VREFOUT=0.75 V DDR3, IO=0 A |
| VO Output DC Voltage Error | -15 mV min, 15 mV max; condition: VREFOUT=0.675 V DDR3L, IO=0 A |
| VO Output DC Voltage Error | -15 mV min, 15 mV max; condition: VREFOUT=0.6 V DDR4, IO=0 A |
| Output Voltage Tolerance to REFOUT | -25 mV min, 25 mV max; condition: -2 A < IVO < 2 A |
| VO Source Current Limit | 3 A min, 4.5 A typ; condition: With reference to REFOUT, VOSNS=90% x VREFOUT |
| VO Sink Current Limit | 3.5 A min, 5.5 A typ; condition: With reference to REFOUT, VOSNS=110% x VREFOUT |
| VO Discharge Resistance | 18 ohm typ, 25 ohm max; condition: VREFIN=0 V, VVO=0.3 V, VEN=0 V, TA=25 C |
| PGOOD Lower Threshold | -23.5% min, -20% typ, -17.5% max; condition: With respect to REFOUT |
| PGOOD Upper Threshold | 17.5% min, 20% typ, 23.5% max; condition: With respect to REFOUT |
| PGOOD Hysteresis | 5%; condition: Power-good comparator |
| PGOOD Start-Up Delay | 2 ms; condition: Start-up rising edge, VOSNS within 15% of REFOUT |
| PGOOD Output Low Voltage | 0.4 V max; condition: ISINK=4 mA |
| PGOOD Bad Delay | 10 us; condition: VOSNS outside +/-20% PGOOD window |
| PGOOD Leakage Current | 1 uA max; condition: VOSNS=VREFIN, PGOOD high impedance, VPGOOD=VVIN+0.2 V |
| REFIN Voltage Range | 0.5 V min, 1.8 V max; condition: Electrical characteristics |
| REFIN Undervoltage Lockout | 360 mV min, 390 mV typ, 420 mV max; condition: REFIN rising |
| REFIN UVLO Hysteresis | 20 mV; condition: REFIN undervoltage lockout hysteresis |
| REFOUT Voltage | REFIN; condition: REFOUT tracks REFIN |
| REFOUT Voltage Tolerance to VREFIN | -12 mV min, 12 mV max; condition: -1 mA < IREFOUT < 1 mA, VREFIN=1.25 V |
| REFOUT Voltage Tolerance to VREFIN | -12 mV min, 12 mV max; condition: -1 mA < IREFOUT < 1 mA, VREFIN=0.9 V |
| REFOUT Voltage Tolerance to VREFIN | -12 mV min, 12 mV max; condition: -1 mA < IREFOUT < 1 mA, VREFIN=0.75 V |
| REFOUT Voltage Tolerance to VREFIN | -12 mV min, 12 mV max; condition: -1 mA < IREFOUT < 1 mA, VREFIN=0.675 V |
| REFOUT Voltage Tolerance to VREFIN | -12 mV min, 12 mV max; condition: -1 mA < IREFOUT < 1 mA, VREFIN=0.6 V |
| REFOUT Source Current Limit | 10 mA min, 40 mA typ; condition: VREFOUT=0 V |
| REFOUT Sink Current Limit | 10 mA min, 40 mA typ; condition: VREFOUT=0 V |
| VIN UVLO Wake-Up Threshold | 2.2 V min, 2.3 V typ, 2.375 V max; condition: TA=25 C |
| VIN UVLO Hysteresis | 50 mV; condition: VIN UVLO threshold |
| EN High-Level Input Voltage | 1.7 V min; condition: Enable input |
| EN Low-Level Input Voltage | 0.3 V max; condition: Enable input |
| EN Hysteresis Voltage | 0.5 V; condition: Enable input |
| EN Logic Input Leakage Current | -1 uA min, 1 uA max; condition: EN, TA=25 C |
| Thermal Shutdown Threshold | 150 C; condition: Shutdown temperature; ensured by design |
| Thermal Shutdown Hysteresis | 25 C; condition: Thermal shutdown; ensured by design |
| Datasheet Status | request_only |
Product Overview
The TPS51200 is a Texas Instruments DDR termination regulator categorized under Power_Management. It is built for VTT bus termination applications and supports DDR, DDR2, DDR3, DDR3L, low-power DDR3, and DDR4 memory standards. VIN supports 2.5 V and 3.3 V rails, while VLDOIN supports 1.1 V to 3.5 V operation.
The device provides a buffered REFOUT reference that tracks REFIN and supports +/-10 mA reference current. VO output accuracy is specified with -15 mV to +15 mV DC voltage error at common DDR reference levels, and output voltage tolerance to REFOUT is -25 mV to +25 mV for -2 A < IVO < 2 A.
Assembly uses a 10-pin VSON DRC package with a 3.00 mm x 3.00 mm body. VIN requires a 1 uF to 4.7 uF ceramic decoupling capacitor, while DDR termination applications typically use three 10 uF MLCCs with at least 20 uF output capacitance. REFOUT capacitance must remain below 0.47 uF when DDR-side capacitors are present, and REFOUT cannot be left open.
Key Features
- DDR termination regulator for VTT bus termination applications
- Supports DDR, DDR2, DDR3, DDR3L, LPDDR3, and DDR4
- VIN supports 2.5 V and 3.3 V rails
- VLDOIN operating range from 1.1 V to 3.5 V
- REFOUT buffered reference current rated at +/-10 mA
- VO tolerance to REFOUT is +/-25 mV over load
- PGOOD window uses +/-20% typical thresholds
- PGOOD start-up delay specified at 2 ms
- 10-pin VSON package with 3.00 mm square body
- Free-air operating range from -40 C to +85 C
Typical Applications
- DDR VTT bus termination
- DDR2 memory termination
- DDR3 memory termination
- DDR3L termination rails
- Low-power DDR3 systems
- DDR4 termination applications
- 2.5 V rail systems
- 3.3 V rail systems
Procurement Notes
When requesting a quote for TPS51200, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What memory standards does the TPS51200 support?
The TPS51200 supports VTT bus termination applications for DDR, DDR2, DDR3, DDR3L, low-power DDR3, and DDR4 memory standards, based on the extracted datasheet facts.
What package is used for the TPS51200?
The TPS51200 is supplied in a 10-pin VSON DRC package with a 3.00 mm x 3.00 mm body, according to the device information and package facts.
What capacitance is required on VIN and output?
The VIN pin requires a 1 uF to 4.7 uF ceramic decoupling capacitor. For DDR termination applications, the output requires at least 20 uF, typically implemented with three 10 uF MLCCs.
How does REFOUT behave on the TPS51200?
REFOUT tracks REFIN and provides a buffered reference output. The extracted facts specify +/-10 mA buffered reference current and REFOUT voltage tolerance of -12 mV to +12 mV under listed VREFIN conditions.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.