📌 Product Overview
The INA117 from Texas Instruments is a precision unity-gain difference amplifier built on a monolithic IC with an integrated thin-film resistor network. Its defining capability is measuring small differential voltages riding on common-mode signals up to ±200V continuous (±500V momentary), without galvanic isolation. Engineers' key selection variables are common-mode range, 0.05% max gain error, 0.001% max nonlinearity, and CSO-dependent bandwidth (200kHz/500kHz).
🎯 Typical Applications & Design Context
- 🔹 Servo drives and machine tools — bus/phase voltage sensing where shunt isolation is impractical
- 🔹 Semiconductor test and ATE — high-voltage node measurement with 0.001% linearity demands
- 🔹 Ultrasound scanners — small signal recovery against large common-mode offsets
- 💡 Where full isolation amplifiers are overkill, the INA117 eliminates isolated input-side power supplies, plus their ripple, noise, and quiescent current penalties.
📊 Key Technical Specifications
| Parameter | Value | Note |
|---|---|---|
| Common-mode input range | ±200V continuous | VS = ±15V |
| Differential overload | ±500V (0.1s peak) | protected inputs |
| Gain | Unity, ±0.05% max error | thin-film matched |
| Nonlinearity | 0.001% max | |
| CMRR | 70dB min | |
| Bandwidth | 200kHz (CSO: SHE) / 500kHz (CSO: TID) | design for worst case |
| Supply | ±5V to ±18V dual (typ ±15V); 10–36V single | |
| Temperature | –40°C to +85°C specified |
💡 Note the CSO (chip site origin) bandwidth split — TI explicitly recommends designing to all flows, meaning the 200kHz figure should anchor your timing budget.
⚠️ Absolute Maximum Ratings & Process Limits
| Rating | Limit | Unit |
|---|---|---|
| Supply VS (dual) | ±22 | V |
| Signal input, continuous | ±200 | V |
| Signal input, peak (0.1s) | ±500 | V |
| Output short-circuit | continuous (to VS/2) | |
| Junction temperature | 150 | °C |
| Lead temp (solder, 10s) | 300 | °C |
🚨 E-E-A-T field note: Continuous common-mode beyond ±200V does not fail immediately — internal thin-film resistors dissipate and drift, degrading gain error permanently over weeks. In the field, surge events (motor regeneration, inrush) exceeding the 0.1s/±500V window are the top root cause of "parameter drift" returns. Verify front-end series impedance against transient energy, not just steady-state voltage.
🧩 Package, Dimensions & Assembly Notes
- INA117P: 8-pin PDIP, 6.35mm × 9.81mm — prototyping and through-hole service
- INA117KU: SOIC-8, 3.91mm × 4.9mm — standard SMT line (INA117KU/2K5 = tape-and-reel)
- Reference pins (REFA pin 5, REFB pin 1) allow output offset trimming; NC pin 8 may be grounded or left floating.
- 👇 SMT note: respect the 300°C/10s lead limit; standard SnPb-compatible reflow profiles are safe for the SOIC-8. Keep high-voltage creepage clearance on the PCB layout — package size does not define your isolation spacing.
🔍 Procurement & Sourcing Insights
- 🔒 CSO variance: Units from different TI fabrication flows differ in bandwidth. Mixed-lot production can create field inconsistency — request lot-origin disclosure for ATE builds.
- 📈 Lead time: Industrial-grade precision amplifiers face allocation cycles; lock SOIC-8 tape-and-reel (KU/2K5) quantities early for volume runs.
- ✅ Traceability: Huaqiangbei channel INA117 is a known counterfeit target (relabeled lower-CMR op amps). Source with date-code and COC verification — LDeepAI provides full lot traceability and sample-before-MOQ support.
❓ FAQ
Q: Can the INA117 replace an isolation amplifier?
A: Yes, where galvanic isolation is not mandatory. It removes the isolated DC/DC supply and its ripple/noise, but provides no true barrier — input and output share a common supply reference.
Q: SOIC-8 vs PDIP — any performance difference?
A: Electrical specs are identical; thermal θJA differs significantly (150°C/W SOIC vs 80°C/W PDIP). High-continuous-CMRR dissipation designs should verify junction temperature in the SOIC package.
Q: What is the most common substitution mistake?
A: Pin-compatible generic difference amplifiers (e.g., INA105) lack ±200V input range — the resistor network ratio differs. Footprint may match; the withstand voltage will not.
Q: Why does bandwidth differ between units?
A: TI qualifies multiple fabrication flows (CSO). Datasheet states 200kHz vs 500kHz depending on chip site origin; design to 200kHz.
Q: How do I verify authenticity?
A: Check TI date codes, lot markings, and request certificates of conformance. LDeepAI screens for remarked parts via electrical CMRR testing at ±100V common-mode.
