Specifications
| Type | Description |
|---|---|
| Part Number | AM3356 |
| Manufacturer | Texas Instruments |
| Product Type | Sitara ARM Cortex-A8 processor |
| Category | Microcontroller |
| Component Type | MCU |
| Package Case | NFBGA(324) 15.0 mm x 15.0 mm; NFBGA(298) 13.0 mm x 13.0 mm |
| CPU Core | ARM Cortex-A8 32-bit RISC processor |
| CPU Core Condition | AM335x Sitara processor family |
| CPU Maximum Frequency | Up to 1 GHz |
| CPU Maximum Frequency Condition | ARM Cortex-A8 processor |
| SIMD Coprocessor | NEON SIMD coprocessor |
| SIMD Coprocessor Condition | Integrated with ARM Cortex-A8 subsystem |
| L1 Cache | 32 KB instruction cache and 32 KB data cache with single-error detection parity |
| L1 Cache Condition | ARM Cortex-A8 subsystem |
| L2 Cache | 256 KB with ECC |
| L2 Cache Condition | ARM Cortex-A8 subsystem |
| Boot ROM | 176 KB on-chip boot ROM |
| Boot ROM Condition | On-chip memory |
| Dedicated RAM | 64 KB dedicated RAM |
| Dedicated RAM Condition | On-chip memory |
| Shared On-Chip RAM | 64 KB general-purpose OCMC RAM |
| Shared On-Chip RAM Condition | Shared L3 RAM, accessible to all masters |
| External Memory Types | mDDR/LPDDR, DDR2, DDR3, DDR3L |
| External Memory Types Condition | EMIF memory controller |
| mDDR Data Rate | 400 MHz data rate |
| mDDR Data Rate Condition | 200 MHz memory clock |
| DDR2 Data Rate | 532 MHz data rate |
| DDR2 Data Rate Condition | 266 MHz memory clock |
| DDR3 Data Rate | 800 MHz data rate |
| DDR3 Data Rate Condition | 400 MHz memory clock |
| DDR3L Data Rate | 800 MHz data rate |
| DDR3L Data Rate Condition | 400 MHz memory clock |
| DDR Data Bus Width | 16-bit data bus |
| DDR Data Bus Width Condition | EMIF memory interface |
| DDR Addressable Space | 1 GB total addressable space |
| DDR Addressable Space Condition | External memory interface |
| PRU Count | Two programmable real-time units |
| PRU Count Condition | PRU-ICSS subsystem |
| PRU Frequency | 200 MHz |
| PRU Frequency Condition | 32-bit load/store RISC processor |
| PRU Instruction RAM | 8 KB per PRU with single-error detection parity |
| PRU Instruction RAM Condition | PRU-ICSS subsystem |
| PRU Data RAM | 8 KB per PRU with single-error detection parity |
| PRU Data RAM Condition | PRU-ICSS subsystem |
| USB Interfaces | Up to 2 USB 2.0 high-speed dual-role-device ports with integrated PHY |
| USB Interfaces Condition | Peripheral interfaces |
| Ethernet MACs | Up to 2 industrial gigabit Ethernet MACs supporting 10/100/1000 Mbps |
| Ethernet MACs Condition | Each MAC supports MII, RMII, RGMII, and MDIO |
| CAN Interfaces | Up to 2 CAN ports |
| CAN Interfaces Condition | Supports CAN version 2 parts A and B |
| UART Interfaces | Up to 6 UARTs |
| UART Interfaces Condition | All support IrDA, CIR, RTS, and CTS; UART1 supports full modem control |
| SPI Interfaces | Up to 2 McSPI master/slave interfaces, up to 48 MHz |
| SPI Interfaces Condition | Up to 2 chip selects |
| MMC/SD/SDIO Ports | Up to 3 ports, up to 48 MHz data transfer rate |
| MMC/SD/SDIO Ports Condition | 1-bit, 4-bit, and 8-bit modes; compliant with MMC 4.3 and SD/SDIO 2.0 |
| I2C Interfaces | Up to 3 master/slave interfaces |
| I2C Interfaces Condition | Standard mode up to 100 kHz, fast mode up to 400 kHz |
| GPIO | Up to 4 banks, 32 GPIO pins per bank |
| GPIO Condition | Pins multiplexed with other functions; up to 2 interrupt inputs per bank |
| ADC | 12-bit SAR ADC, 200 kSPS, 8 analog inputs |
| ADC Condition | Inputs multiplexed through 8:1 analog switch |
| LCD Controller | Up to 24-bit data output, resolution up to 2048 x 2048 |
| LCD Controller Condition | Maximum 126 MHz pixel clock |
| Graphics Engine | PowerVR SGX530 3D graphics engine |
| Graphics Engine Condition | Tile-based architecture up to 20 million polygons per second |
| Timers | Eight 32-bit general-purpose timers and one watchdog timer |
| Timers Condition | DMTIMER1 is a 1-ms OS tick timer; DMTIMER4-DMTIMER7 pinned out |
| RTC | Real-time date and time with internal 32.768 kHz oscillator |
| RTC Condition | Includes RTC logic and 1.1 V internal LDO |
| Security Hardware | AES, SHA, and RNG crypto hardware accelerators |
| Security Hardware Condition | Secure boot optional with custom TI engagement |
| AM3356 Package Options | AM3356ZCZ and AM3356ZCE |
| AM3356 Package Options Condition | NFBGA(324) 15.0 mm x 15.0 mm and NFBGA(298) 13.0 mm x 13.0 mm |
| Datasheet Status | request_only |
Product Overview
The AM3356 is a Texas Instruments Sitara ARM Cortex-A8 processor categorized here as a Microcontroller. Its main CPU subsystem uses an ARM Cortex-A8 32-bit RISC processor operating up to 1 GHz and includes a NEON SIMD coprocessor, 32 KB instruction cache, 32 KB data cache, and 256 KB L2 cache with ECC.
On-chip memory resources include 176 KB boot ROM, 64 KB dedicated RAM, and 64 KB shared general-purpose OCMC RAM accessible to all masters. The EMIF controller supports mDDR/LPDDR, DDR2, DDR3, and DDR3L memory with a 16-bit data bus and 1 GB total addressable space.
Peripheral integration covers up to two USB 2.0 high-speed dual-role-device ports, two industrial gigabit Ethernet MACs, two CAN ports, six UARTs, two McSPI interfaces, three MMC/SD/SDIO ports, three I2C interfaces, GPIO banks, a 12-bit SAR ADC, LCD controller, PowerVR SGX530 graphics engine, timers, RTC, and AES, SHA, and RNG hardware accelerators. AM3356 package options are AM3356ZCZ and AM3356ZCE in NFBGA formats.
Key Features
- ARM Cortex-A8 32-bit RISC processor up to 1 GHz
- NEON SIMD coprocessor integrated with Cortex-A8 subsystem
- 32 KB instruction and 32 KB data L1 cache
- 256 KB L2 cache with ECC protection
- 176 KB boot ROM and 64 KB dedicated RAM
- 64 KB shared general-purpose OCMC RAM
- Supports mDDR, LPDDR, DDR2, DDR3, and DDR3L memory
- Two 200 MHz programmable real-time units
- Up to two USB 2.0 high-speed dual-role ports
- Up to two industrial gigabit Ethernet MACs
- 12-bit SAR ADC with 8 analog inputs
- PowerVR SGX530 3D graphics engine
Typical Applications
- Industrial Ethernet control nodes
- CAN-connected embedded controllers
- LCD-based operator interfaces
- USB dual-role embedded devices
- Graphics-enabled control panels
- Data acquisition with SAR ADC
- Real-time PRU-based I/O control
- Embedded systems with DDR memory
Procurement Notes
When requesting a quote for AM3356, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For MCU, processor and logic IC sourcing, package, operating voltage, temperature grade, speed or frequency grade, firmware or mask version, lifecycle status and programming requirements should be checked before approval.
FAQ
What processor core is used in the AM3356?
The AM3356 uses an ARM Cortex-A8 32-bit RISC processor. The extracted datasheet facts specify operation up to 1 GHz and integration with a NEON SIMD coprocessor in the ARM Cortex-A8 subsystem.
Which external memory types does the AM3356 support?
The AM3356 EMIF memory controller supports mDDR/LPDDR, DDR2, DDR3, and DDR3L. The interface uses a 16-bit data bus and provides 1 GB total addressable external memory space.
What package options are listed for AM3356?
The listed AM3356 package options are AM3356ZCZ and AM3356ZCE. The package cases are NFBGA(324) measuring 15.0 mm x 15.0 mm and NFBGA(298) measuring 13.0 mm x 13.0 mm.
What communication interfaces are available on the AM3356?
The AM3356 includes up to two USB 2.0 high-speed dual-role ports, two industrial gigabit Ethernet MACs, two CAN ports, six UARTs, two McSPI interfaces, three MMC/SD/SDIO ports, and three I2C interfaces.
What security features are available on the AM3356?
The datasheet facts include AES, SHA, and RNG hardware security accelerators. No further security certification details are provided in the extracted datasheet information.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.