Specifications
| Type | Description |
|---|---|
| Part Number | AM3359 |
| Manufacturer | Texas Instruments |
| Product Type | Sitara ARM Cortex-A8 processor |
| Category | Microcontroller |
| Component Type | MCU |
| Package Case | NFBGA(324) 15.0 mm x 15.0 mm; NFBGA(298) 13.0 mm x 13.0 mm |
| Processor Core | ARM Cortex-A8 32-bit RISC |
| Maximum CPU Frequency | Up to 1 GHz |
| SIMD Coprocessor | NEON SIMD coprocessor |
| L1 Instruction Cache | 32 KB, with single-error detection parity |
| L1 Data Cache | 32 KB, with single-error detection parity |
| L2 Cache | 256 KB, with ECC |
| Boot ROM | 176 KB, on-chip boot ROM |
| Dedicated RAM | 64 KB, on-chip dedicated RAM |
| Shared L3 OCMC RAM | 64 KB, accessible to all masters |
| Interrupt Requests | Up to 128 |
| DDR Interface Types | mDDR(LPDDR), DDR2, DDR3, DDR3L |
| mDDR Clock | 200 MHz clock, 400 MHz data rate |
| DDR2 Clock | 266 MHz clock, 532 MHz data rate |
| DDR3 Clock | 400 MHz clock, 800 MHz data rate |
| DDR3L Clock | 400 MHz clock, 800 MHz data rate |
| DDR Data Bus Width | 16-bit |
| Total Addressable DDR Space | 1 GB |
| GPMC Bus Width | 8-bit and 16-bit |
| GPMC Chip Selects | Up to 7 |
| NAND ECC Support | 4-bit, 8-bit, or 16-bit BCH ECC; 1-bit Hamming ECC |
| PRU Count | 2 programmable real-time units |
| PRU Frequency | 200 MHz |
| PRU Instruction RAM | 8 KB per PRU, with single-error detection parity |
| PRU Data RAM | 8 KB per PRU, with single-error detection parity |
| PRU Shared RAM | 12 KB, with single-error detection parity |
| PRU UART Data Rate | Up to 12 Mbps |
| USB Ports | Up to 2 USB 2.0 high-speed DRD ports with integrated PHY |
| Ethernet MACs | Up to 2 industrial gigabit Ethernet MACs |
| Ethernet Speed and Switch | 10/100/1000 Mbps, integrated switch |
| Ethernet Interfaces | MII, RMII, RGMII, MDIO |
| CAN Ports | Up to 2, supports CAN version 2 parts A and B |
| UART Interfaces | Up to 6; IrDA, CIR, RTS, and CTS support |
| UART1 Control | UART1 supports full modem control |
| SPI Interfaces | Up to 2 McSPI master/slave interfaces |
| SPI Chip Selects and Frequency | Up to 2 chip selects, up to 48 MHz |
| MMC/SD/SDIO Ports | Up to 3 |
| MMC/SD/SDIO Modes | 1-bit, 4-bit, and 8-bit modes; up to 48 MHz data transfer rate |
| I2C Interfaces | Up to 3 master/slave interfaces |
| I2C Speed | Standard mode up to 100 kHz, fast mode up to 400 kHz |
| GPIO Banks | Up to 4 banks |
| GPIO Pins Per Bank | 32 GPIO pins per bank, multiplexed with other functional pins |
| General-Purpose Timers | 8 x 32-bit timers |
| Timer Notes | DMTIMER1 is a 1-ms OS tick timer; DMTIMER4-DMTIMER7 are pinned out |
| Graphics Engine | SGX530 3D graphics engine |
| Graphics Performance | Tile-based architecture up to 20 million polygons per second |
| LCD Controller Output | Up to 24-bit data output; 8 bits per pixel RGB |
| LCD Resolution | Up to 2048 x 2048 |
| LCD Pixel Clock | Maximum 126 MHz pixel clock |
| LCD FIFO Depth | 512-word internal FIFO |
| ADC Resolution | 12-bit SAR |
| ADC Sample Rate | 200 k samples/s |
| ADC Inputs | 8 analog inputs through 8:1 analog switch |
| DMA Controller | EDMA with 3 TPTCs and 1 TPCC |
| DMA Channels | Up to 64 programmable logical channels and 8 QDMA channels |
| RTC Oscillator | 32.768 kHz |
| RTC Logic | Internal RTC oscillator with RTC logic and 1.1 V internal LDO |
| High-Frequency Oscillator | 15 MHz to 35 MHz |
| High-Frequency Oscillator Function | Integrated oscillator used to generate reference clocks |
| Package Option ZCE | 298-pin S-PBGA-N298, 0.65 mm ball pitch |
| Package Option ZCZ | 324-pin S-PBGA-N324, 0.80 mm ball pitch |
| Datasheet Status | request_only |
Product Overview
The AM3359 is a Texas Instruments Sitara ARM Cortex-A8 processor categorized here as a Microcontroller. Its MPU subsystem uses an ARM Cortex-A8 32-bit RISC processor running up to 1 GHz with a NEON SIMD coprocessor. On-chip memory resources include 176 KB boot ROM, 64 KB dedicated RAM, 64 KB shared L3 OCMC RAM, 32 KB instruction cache, 32 KB data cache, and 256 KB L2 cache with ECC.
External memory support covers mDDR(LPDDR), DDR2, DDR3, and DDR3L through a 16-bit DDR interface with up to 1 GB addressable DDR space. The GPMC supports 8-bit and 16-bit asynchronous memory interfaces for NAND, NOR, muxed-NOR, and SRAM, with up to 7 chip selects and NAND ECC options including BCH and Hamming modes.
Peripheral resources include USB 2.0 high-speed DRD ports, industrial gigabit Ethernet MACs, CAN, UART, McSPI, MMC/SD/SDIO, I2C, GPIO, timers, LCD controller, ADC, EDMA, RTC oscillator, and high-frequency oscillator functions. Package options include 298-pin S-PBGA-N298 at 0.65 mm pitch and 324-pin S-PBGA-N324 at 0.80 mm pitch.
Key Features
- ARM Cortex-A8 32-bit RISC core up to 1 GHz
- NEON SIMD coprocessor in the MPU subsystem
- 32 KB instruction and 32 KB data L1 cache
- 256 KB L2 cache with ECC protection
- mDDR, DDR2, DDR3, and DDR3L memory support
- 16-bit DDR interface with 1 GB addressable space
- Two 200 MHz programmable real-time units
- Up to two USB 2.0 high-speed DRD ports
- Up to two industrial gigabit Ethernet MACs
- SGX530 3D graphics engine for display applications
- 12-bit SAR ADC with 200 k samples/s rate
- 298-pin and 324-pin S-PBGA package options
Typical Applications
- Industrial Ethernet control
- Embedded Linux processing
- Real-time PRU I/O control
- LCD human-machine interfaces
- USB connected embedded systems
- CAN based industrial nodes
- MMC and SD storage interfaces
- NAND, NOR, and SRAM memory systems
Procurement Notes
When requesting a quote for AM3359, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For MCU, processor and logic IC sourcing, package, operating voltage, temperature grade, speed or frequency grade, firmware or mask version, lifecycle status and programming requirements should be checked before approval.
FAQ
What processor core is used in the AM3359?
The AM3359 uses an ARM Cortex-A8 32-bit RISC processor in the Sitara processor family. The extracted datasheet facts list operation up to 1 GHz and include a NEON SIMD coprocessor in the MPU subsystem.
Which external DDR memory types does AM3359 support?
The AM3359 external memory interface supports mDDR(LPDDR), DDR2, DDR3, and DDR3L. The DDR interface is 16-bit wide and supports up to 1 GB of total addressable DDR space.
What real-time processing resources are included?
The AM3359 includes two programmable real-time units in the PRU-ICSS subsystem. Each PRU is a 200 MHz 32-bit load/store RISC processor with 8 KB instruction RAM and 8 KB data RAM.
What package options are listed for AM3359?
The extracted package facts list a 298-pin S-PBGA-N298 option with 0.65 mm ball pitch for the ZCE suffix and a 324-pin S-PBGA-N324 option with 0.80 mm ball pitch for the ZCZ suffix.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.