Specifications
| Type | Description |
|---|---|
| Part Number | DS90LV048A |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | SOIC-16 (9.90 mm x 3.91 mm), TSSOP-16 (5.00 mm x 4.40 mm) |
| Switching rate | >400 Mbps (200 MHz), LVDS receiver operation |
| Channel-to-channel skew | 150 ps typ, same device |
| Differential skew | 100 ps typ, typical differential pulse skew |
| Maximum propagation delay | 2.7 ns max, differential receiver propagation delay |
| Power supply design voltage | 3.3 V, nominal supply |
| Static power dissipation | 40 mW, VCC=3.3 V, static |
| Differential input signal level | 350 mV typ, accepted LVDS input swing |
| Operating temperature range | -40 to 85 °C, free-air operating range |
| Supply voltage absolute maximum | -0.3 to 4 V, VCC absolute maximum rating |
| Receiver input voltage absolute maximum | -0.3 to 3.6 V, RIN+, RIN- absolute maximum rating |
| Enable input voltage absolute maximum | -0.3 to VCC+0.3 V, EN, EN* absolute maximum rating |
| Output voltage absolute maximum | -0.3 to VCC+0.3 V, ROUT absolute maximum rating |
| Maximum package power dissipation | 1025 mW, D0016A package, TA=25°C |
| Maximum package power dissipation | 866 mW, PW0016A package, TA=25°C |
| Power derating | 8.2 mW/°C, D0016A package above 25°C |
| Power derating | 6.9 mW/°C, PW0016A package above 25°C |
| Lead soldering temperature | 260 °C, 4 s soldering exposure |
| Maximum junction temperature | 150 °C, absolute maximum rating |
| Storage temperature | -65 to 150 °C, Tstg |
| ESD rating, human-body model | ±10000 V, HBM, 1.5 kΩ / 100 pF |
| ESD rating, machine model | ±1200 V, EIAJ, 0 Ω / 200 pF |
| Recommended supply voltage | 3.0 V min, 3.3 V nom, 3.6 V max, VCC operating condition |
| Recommended receiver input voltage | GND to 3 V, receiver input operating condition |
| Recommended operating free-air temperature | -40 °C min, 25 °C nom, 85 °C max, TA |
| Junction-to-ambient thermal resistance | 110.2 °C/W, PW TSSOP-16 package |
| Junction-to-case top thermal resistance | 47 °C/W, PW TSSOP-16 package |
| Junction-to-board thermal resistance | 54.7 °C/W, PW TSSOP-16 package |
| Junction-to-top characterization parameter | 6.1 °C/W, PW TSSOP-16 package |
| Junction-to-board characterization parameter | 54.2 °C/W, PW TSSOP-16 package |
| Differential input high threshold | -35 mV min, 0 mV max, VCM=+1.2 V, 0.05 V, 2.95 V |
| Differential input low threshold | -100 mV min, -35 mV max, VCM=+1.2 V, 0.05 V, 2.95 V |
| Common-mode voltage range | 0.1 to 2.3 V, VID=200 mV peak-to-peak, RIN+/RIN- |
| Input current | -10 µA min, ±5 µA typ, 10 µA max, VIN=+2.8 V, VCC=3.6 V or 0 V |
| Input current | -10 µA min, ±1 µA typ, 10 µA max, VIN=0 V |
| Input current | -20 µA min, ±1 µA typ, 20 µA max, VIN=+3.6 V, VCC=0 V |
| Output high voltage | 2.7 V min, 3.3 V typ, IOH=-0.4 mA, VID=+200 mV |
| Output high voltage | 2.7 V min, 3.3 V typ, IOH=-0.4 mA, input terminated |
| Output high voltage | 2.7 V min, 3.3 V typ, IOH=-0.4 mA, input shorted |
| Output low voltage | 0.05 V typ, 0.25 V max, IOL=2 mA, VID=-200 mV |
| Output short-circuit current | -15 mA min, -47 mA typ, -100 mA max, enabled, VOUT=0 V; one output shorted at a time |
| Output TRI-STATE current | -10 µA min, ±1 µA typ, 10 µA max, disabled, VOUT=0 V or VCC |
| Enable input high voltage | 2 V min, VCC max, EN, EN* |
| Enable input low voltage | GND min, 0.8 V max, EN, EN* |
| Enable input current | -10 µA min, ±5 µA typ, 10 µA max, VIN=0 V or VCC, other input=VCC or GND |
| Input clamp voltage | -1.5 V min, -0.8 V typ, ICL=-18 mA |
| No-load supply current, receivers enabled | 9 mA typ, 15 mA max, EN=VCC, inputs open |
| No-load supply current, receivers disabled | 1 mA typ, 5 mA max, EN=GND, inputs open |
| Differential propagation delay high-to-low | 1.2 ns min, 2 ns typ, 2.7 ns max, CL=15 pF, VID=200 mV |
| Differential propagation delay low-to-high | 1.2 ns min, 1.9 ns typ, 2.7 ns max, CL=15 pF, VID=200 mV |
| Differential pulse skew | 0 ns min, 0.1 ns typ, 0.4 ns max, |tPHLD - tPLHD| |
| Differential channel-to-channel skew | 0 ns min, 0.15 ns typ, 0.5 ns max, same device, CL=15 pF, VID=200 mV |
| Differential part-to-part skew | 1 ns max, devices at same VCC and within 5°C |
| Differential part-to-part skew | 1.5 ns max, across recommended operating temperature and voltage ranges and process distribution |
| Output rise time | 0.5 ns typ, 1 ns max, CL=15 pF, VID=200 mV |
| Output fall time | 0.35 ns typ, 1 ns max, CL=15 pF, VID=200 mV |
| Disable time high-to-Z | 8 ns typ, 14 ns max, RL=2 kΩ, CL=15 pF |
| Disable time low-to-Z | 8 ns typ, 14 ns max, RL=2 kΩ, CL=15 pF |
| Enable time Z-to-high | 9 ns typ, 14 ns max, RL=2 kΩ, CL=15 pF |
| Enable time Z-to-low | 9 ns typ, 14 ns max, RL=2 kΩ, CL=15 pF |
| Maximum operating frequency | 200 MHz min, 250 MHz typ, all channels switching; generator tr=tf<1 ns, 50% duty cycle, differential 1.05 V to 1.35 V peak-to-peak; load=15 pF |
| Receiver enable behavior | Receiver enabled when EN is high and EN* is low or open, EN and EN* common to all four receivers |
| Fail-safe output state | Output HIGH, open, shorted, and terminated 100 Ω input fail-safe conditions |
| Datasheet Status | request_only |
Product Overview
The DS90LV048A is a Texas Instruments 3-V LVDS quad CMOS receiver for Signal_Chain designs. It provides four LVDS receiver channels with common enable controls, where the receivers are enabled when EN is high and EN* is low or open. Under open, shorted, or terminated 100 Ω input fail-safe conditions, the output state is HIGH.
Receiver performance includes a switching rate greater than 400 Mbps, a 200 MHz minimum and 250 MHz typical maximum operating frequency, and differential propagation delays of 1.2 ns to 2.7 ns with 15 pF load and 200 mV differential input. Typical differential pulse skew is 0.1 ns, and same-device channel-to-channel skew is 0.15 ns under the listed test condition.
The part is available in SOIC-16 and TSSOP-16 package options. Recommended VCC operation is 3.0 V to 3.6 V with 3.3 V nominal, and the free-air operating range is -40 °C to 85 °C. Assembly and limit data include 260 °C lead soldering for 4 s, 150 °C maximum junction temperature, and package-specific power dissipation and derating limits.
Key Features
- >400 Mbps LVDS receiver switching rate
- 200 MHz minimum all-channel operating frequency
- 2.7 ns maximum differential receiver propagation delay
- 0.1 ns typical differential pulse skew
- 0.15 ns typical same-device channel-to-channel skew
- 3.0 V to 3.6 V recommended VCC range
- Open, shorted, and terminated inputs produce HIGH output
- Common EN and EN* controls for four receivers
- Output TRI-STATE current specified when disabled
- -40 °C to 85 °C free-air operation
Typical Applications
- LVDS signal reception
- Quad-channel receiver interfaces
- 3.3 V signal-chain designs
- Fail-safe LVDS input handling
- Enabled receiver bus control
- TRI-STATE output systems
- High-speed differential data links
Procurement Notes
When requesting a quote for DS90LV048A, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What type of device is the DS90LV048A?
The DS90LV048A is a Texas Instruments 3-V LVDS quad CMOS receiver in the Signal_Chain category. It is specified for LVDS receiver operation with a switching rate greater than 400 Mbps and a nominal 3.3 V supply.
What packages are specified for the DS90LV048A?
The extracted package data lists SOIC-16 at 9.90 mm x 3.91 mm and TSSOP-16 at 5.00 mm x 4.40 mm. Package-specific dissipation and derating values are provided for D0016A and PW0016A package conditions.
How are the DS90LV048A receivers enabled?
The receiver enable controls are common to all four receivers. The receiver is enabled when EN is high and EN* is low or open, with enable input thresholds specified as 2 V minimum high and 0.8 V maximum low.
What happens under DS90LV048A fail-safe input conditions?
For open, shorted, and terminated 100 Ω input fail-safe conditions, the output state is HIGH. The datasheet facts also list output high-voltage behavior for terminated and shorted input conditions.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.