Specifications
| Type | Description |
|---|---|
| Part Number | DS90UB914 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | WQFN-48, 7.00 mm x 7.00 mm |
| Input Pixel Clock Support | 25 MHz to 100 MHz |
| Data Payload | 10-bit up to 100 MHz |
| Data Payload | 12-bit up to 75 MHz |
| Control Interface | I2C support at 400 kHz |
| Input Multiplexer | 2:1 |
| Coaxial Cable Receive Distance | over 15 m |
| Shielded Twisted-Pair Cable Receive Distance | 20 m |
| Power Supply Voltage | 1.8 V |
| Operating Ambient Temperature | -40°C to +105°C |
| HBM ESD Classification | ±8 kV |
| CDM ESD Classification | C6 |
| Automotive Qualification | AEC-Q100 qualified |
| Interface Type | FPD-Link III |
| Forward Channel Signaling | Differential signaling |
| Control Channel Signaling | Differential signaling |
| Video Data Depth | Up to 12-bit pixel depth plus two synchronization signals |
| Control Channel Timing Dependency | Independent of video blanking period |
| Encoding | Internal DC-balanced encoding/decoding |
| Receive Equalization | Automatic adaptive equalizer |
| Power Over Coax | Supported |
| Link Integrity Diagnostics | LOCK output reporting pin and @SPEED BIST |
| EMI/EMC Mitigation | Programmable spread spectrum and receiver staggered outputs |
| ESD Compliance | ISO 10605 and IEC 61000-4-2 compliant |
| Air Discharge ESD Rating | minimum ±25000 V |
| Compatible Serializer | DS90UB913A-Q1 |
| Datasheet Status | request_only |
Product Overview
The DS90UB914 is a Texas Instruments FPD-Link III deserializer for Signal_Chain applications that receive video data and control information over an FPD-Link III connection. Its input pixel clock support spans 25 MHz to 100 MHz, with programmable payload modes for 10-bit data up to 100 MHz and 12-bit data up to 75 MHz. Video transport supports up to 12-bit pixel depth plus two synchronization signals.
The interface uses differential signaling on both the high-speed forward channel and the bidirectional control channel. The control channel accepts I2C control information at 400 kHz and operates independently of the video blanking period. Internal DC-balanced encoding and decoding supports AC-coupled interconnects, while the automatic adaptive equalizer compensates for cable and media loss over longer links.
The device is supplied from a single 1.8 V rail and is offered in a WQFN-48, 7.00 mm x 7.00 mm package. It supports selection between two input imagers through a 2:1 input multiplexer, Power-over-Coax operation, LOCK output reporting, @SPEED BIST, programmable spread spectrum, and receiver staggered outputs for EMI/EMC mitigation.
Key Features
- FPD-Link III deserializer for high-speed forward channel links
- 25 MHz to 100 MHz deserializer input pixel clock support
- 10-bit payload operation up to 100 MHz
- 12-bit payload operation up to 75 MHz
- Bidirectional I2C control channel supports 400 kHz operation
- 2:1 input multiplexer selects between two input imagers
- Receives over coaxial cable distances greater than 15 m
- Receives over shielded twisted-pair cable distances of 20 m
- Automatic adaptive equalizer compensates cable and media loss
- Programmable spread spectrum and staggered outputs mitigate EMI/EMC
Typical Applications
- Automotive imager deserialization
- FPD-Link III video links
- Coaxial cable receive links
- Shielded twisted-pair receive links
- Power-over-Coax camera links
- Remote I2C control channels
- Dual-imager input selection
- Link integrity validation
Procurement Notes
When requesting a quote for DS90UB914, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What pixel clock range does the DS90UB914 support?
The DS90UB914 supports a deserializer input pixel clock range from 25 MHz to 100 MHz. Its programmable data payload supports 10-bit operation up to 100 MHz and 12-bit operation up to 75 MHz.
Which control interface is supported by the DS90UB914?
The DS90UB914 includes a continuous low-latency bidirectional control interface channel with I2C support at 400 kHz. The control channel operates independently of the video blanking period.
What cable distances are specified for the DS90UB914?
The DS90UB914 supports FPD-Link III receive connections over coaxial cable at distances over 15 m and over shielded twisted-pair cable at 20 m, with automatic adaptive equalization for cable and media loss.
Is the DS90UB914 qualified for automotive applications?
Yes. The DS90UB914 is AEC-Q100 qualified and specified for an operating ambient temperature range of -40°C to +105°C. It also lists ISO 10605 and IEC 61000-4-2 system-level ESD compliance.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.