Specifications
| Type | Description |
|---|---|
| Part Number | DS80PCI102 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | WQFN (24), 4.00 mm x 4.00 mm body |
| Supported PCI Express Data Rates | 2.5 Gbps / 5.0 Gbps / 8.0 Gbps; PCI Express Gen-1, Gen-2, and Gen-3 operation |
| Lane Count | 1 lane; DS80PCI102 device configuration |
| Input Equalization | Up to 36 dB; receiver equalization programmable range |
| Equalization Architecture | 4-stage input equalization; device receiver equalizer |
| Transmit De-emphasis | Up to -12 dB; programmable output de-emphasis driver |
| Transmit VOD | 0.7 to 1.3 Vp-p; adjustable transmit VOD in pin mode |
| Transmit VOD Maximum | Up to 1300 mVp-p; programmable transmit VOD |
| Residual Deterministic Jitter | 0.2 UI; at 8 Gbps after 40 inches FR4 or 10 m 30-AWG PCIe cable |
| Cable Reach | 10 m or more; lossy copper cable interconnect with equalization/de-emphasis |
| Backplane Reach | 40 inches or more; backplane interconnect with multiple connectors |
| Power Dissipation per Channel | 65 mW/channel; low-power operation with ability to turn off unused channels |
| Supply Voltage Modes | 2.5 V or 3.3 V; selectable single-supply operation |
| Operating Temperature Range | -40°C to 85°C; ambient operating temperature range |
| HBM ESD Rating | ±5 kV; human body model ESD rating |
| Configuration Modes | Pins / SMBus / direct EEPROM load; programmable settings configuration |
| High-speed Input Termination | 50 Ω; on-chip gated termination from INn+ and INn- to VDD depending on RXDET state |
| High-speed I/O Coupling | AC coupling required; high-speed CML inputs/outputs |
| Output Driver Termination | 50 Ω; inverting and noninverting driver outputs with de-emphasis |
| SMBus Pullup Resistance | 2 kΩ to 5 kΩ; external pullup for SCL/SDA to VDD or VIN recommended |
| Address Strap Resistance | 1 kΩ; external pullup or pulldown recommended for AD0-AD3 |
| ENSMB High Function | SMBus slave mode; tie 1 kΩ to VDD in 2.5-V mode or VIN in 3.3-V mode |
| ENSMB Float Function | SMBus master mode / external EEPROM read; ENSMB pin floating |
| ENSMB Low Function | Pin mode; tie ENSMB 1 kΩ to GND |
| RATE Pin Gen1/Gen2 Mode | GEN1,2; RATE tied 1 kΩ to GND |
| RATE Pin Auto Mode | Auto rate select of Gen1/2 and Gen3 with de-emphasis; RATE floating |
| RATE Pin Gen3 No De-emphasis Mode | GEN3 without de-emphasis; RATE tied 20 kΩ to GND |
| Absolute Maximum VDD Supply Voltage | -0.5 to 2.75 V; 2.5-V supply pin, absolute maximum rating |
| Absolute Maximum VIN Supply Voltage | -0.5 to 4.0 V; 3.3-V supply pin, absolute maximum rating |
| Absolute Maximum LVCMOS I/O Voltage | -0.5 to 4.0 V; LVCMOS input/output pins |
| Absolute Maximum CML Input Voltage | -0.5 to VDD + 0.5 V; CML input pins |
| Absolute Maximum CML Input Current | -30 to 30 mA; CML input pins |
| Maximum Junction Temperature | 125°C; absolute maximum rating |
| Lead Soldering Temperature | 260°C; 4 seconds |
| Storage Temperature | -40°C to 125°C; storage temperature range |
| ESD Rating HBM | ±5000 V; ANSI/ESDA/JEDEC JS-001, all pins |
| ESD Rating CDM | ±1250 V; JEDEC JESD22-C101, all pins |
| ESD Rating MM | ±100 V; STD-JESD22-A115-A |
| Recommended Supply Voltage, 2.5-V Mode | 2.375 V min, 2.5 V nom, 2.625 V max; 2.5-V mode operation |
| Recommended Supply Voltage, 3.3-V Mode | 3.0 V min, 3.3 V nom, 3.6 V max; 3.3-V mode operation |
| Recommended Ambient Temperature | -40°C min, 25°C nom, 85°C max; operating conditions |
| SMBus SDA/SCL Voltage Maximum | 3.6 V; recommended operating condition for SMBus pins |
| Datasheet Status | request_only |
Product Overview
The DS80PCI102 is a Texas Instruments PCI Express signal repeater for Signal_Chain designs using a 1-lane PCI Express configuration. It supports Gen-1, Gen-2, and Gen-3 operation at 2.5 Gbps, 5.0 Gbps, and 8.0 Gbps, with signal conditioning intended for lossy copper cable and backplane interconnects.
Receiver conditioning is based on 4-stage input equalization programmable up to 36 dB. The transmit path provides programmable output de-emphasis up to -12 dB and adjustable transmit VOD from 0.7 to 1.3 Vp-p in pin mode, with programmable VOD up to 1300 mVp-p. At 8 Gbps, residual deterministic jitter is specified as 0.2 UI after 40 inches of FR4 or 10 m of 30-AWG PCIe cable.
The device is supplied in a WQFN (24), 4.00 mm x 4.00 mm body package. It operates from selectable 2.5 V or 3.3 V single-supply modes and supports configuration through pins, SMBus, or direct EEPROM load. High-speed CML inputs and outputs require AC coupling and use 50 Ω termination.
Key Features
- Supports PCIe Gen-1, Gen-2, and Gen-3 data rates
- Single-lane PCI Express signal repeater configuration
- Four-stage receiver equalization programmable up to 36 dB
- Programmable transmit de-emphasis up to -12 dB
- Adjustable transmit VOD from 0.7 to 1.3 Vp-p
- Residual deterministic jitter of 0.2 UI at 8 Gbps
- Supports 10 m or longer copper cable interconnects
- Supports 40 inch or longer backplane interconnects
- Selectable 2.5 V or 3.3 V single-supply operation
- Pin, SMBus, or direct EEPROM configuration modes
- AC-coupled high-speed CML inputs and outputs required
- 24-pin WQFN package with 4.00 mm square body
Typical Applications
- PCI Express Gen-3 links
- PCI Express Gen-1 and Gen-2 links
- Copper PCIe cable interconnects
- Backplane interconnect signal conditioning
- Lossy FR4 channel extension
- Multi-connector backplane links
- SMBus-configured signal repeaters
- EEPROM-loaded PCIe repeater settings
Procurement Notes
When requesting a quote for DS80PCI102, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What PCI Express data rates does DS80PCI102 support?
DS80PCI102 supports PCI Express Gen-1, Gen-2, and Gen-3 operation. The extracted datasheet facts list supported data rates of 2.5 Gbps, 5.0 Gbps, and 8.0 Gbps for the device.
How much receiver equalization is available on DS80PCI102?
The receiver equalization is programmable up to 36 dB. The device uses a 4-stage input equalization architecture for its receiver equalizer.
What supply voltage modes are specified for DS80PCI102?
DS80PCI102 supports selectable single-supply operation at 2.5 V or 3.3 V. Recommended ranges are 2.375 V to 2.625 V for 2.5-V mode and 3.0 V to 3.6 V for 3.3-V mode.
How can DS80PCI102 configuration settings be programmed?
Configuration can be handled through pins, SMBus, or direct EEPROM load. ENSMB selects pin mode, SMBus slave mode, or SMBus master mode with external EEPROM read depending on its pin state.
What package is used for the DS80PCI102?
The device is listed in a WQFN (24) package with a 4.00 mm x 4.00 mm body. The extracted facts also specify a lead soldering temperature of 260°C for 4 seconds.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.