DS90LV011A 3V LVDS Differential Driver

Texas Instruments Signal_Chain — specifications, applications, sourcing support and RFQ.

DS90LV011A 3V LVDS Differential Driver

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Part Number
DS90LV011A
Manufacturer
Texas Instruments
Package
SOT-23 (DBV), 5 pins, 1.45 mm max height; package outline approx. 3.0 x 1.75 mm body
Category
Signal Chain
Product Type
Operational Amplifier

Quick Sourcing Note

DS90LV011A from Texas Instruments is a Signal_Chain 3V LVDS differential driver in a 5-pin SOT-23 (DBV) package. It provides a single high-speed LVDS differential driver function with TIA/EIA-644-A compliance, greater than 400 Mbps switching rate, and 200 MHz switching frequency. Key electrical parameters include typical ±350 mV differential signaling, 23 mW typical power dissipation at VDD=3.3 V, and a recommended supply range of 3.0 V to 3.6 V. The device supports industrial operation from -40 to +85 °C, uses a TTLIN input, and provides OUT+ and OUT− differential outputs with power-off TRI-STATE behavior.

Specifications

TypeDescription
Part NumberDS90LV011A
ManufacturerTexas Instruments
Product TypeOperational Amplifier
CategorySignal Chain
Package / CaseSOT-23 (DBV), 5 pins, 1.45 mm max height; package outline approx. 3.0 x 1.75 mm body
Component TypeOther
FunctionSingle high-speed LVDS differential driver; device description
Interface StandardTIA/EIA-644-A compliant; feature list
Switching Rate>400 Mbps; feature list
Switching Frequency200 MHz; feature list
Typical Differential Signaling±350 mV; feature list
Typical Power Dissipation23 mW; VDD=3.3 V typical
Power-Off ProtectionOutputs in TRI-STATE; power off condition
Operating Temperature Range-40 to +85 °C; industrial temperature range
Supply Voltage Absolute Maximum-0.3 to +4 V; VDD absolute maximum rating
LVCMOS Input Voltage Absolute Maximum-0.3 to +3.6 V; TTLIN absolute maximum rating
LVDS Output Voltage Absolute Maximum-0.3 to +3.9 V; OUT± absolute maximum rating
LVDS Output Short Circuit Current Absolute Maximum24 mA; absolute maximum rating
Package Power Dissipation902 mW; DBV package, TA=+25°C
Package Power Derating7.22 mW/°C; DBV package above +25°C
Thermal Resistance Junction-to-Ambient138.5 °C/W; DBV package
Storage Temperature-65 to +150 °C; absolute maximum rating
Lead Temperature Soldering+260 °C; 4 seconds
Maximum Junction Temperature+150 °C; absolute maximum rating
ESD Rating HBM≥9 kV; 1.5 kΩ, 100 pF
ESD Rating EIAJ≥900 V; 0 Ω, 200 pF
ESD Rating CDM≥2000 V; 0 Ω, 0 pF
ESD Rating IEC Direct≥4 kV; 330 Ω, 150 pF
Recommended Supply Voltage3.0 min, 3.3 typ, 3.6 max V; VDD recommended operating condition
Recommended Ambient Temperature-40 min, +25 typ, +85 max °C; TA recommended operating condition
Output Differential Voltage250 min, 350 typ, 450 max mV; RL=100 Ω, OUT+ and OUT−
Output Differential Voltage Magnitude Change3 typ, 35 max mV; ΔVOD
Offset Voltage1.125 min, 1.22 typ, 1.375 max V; RL=100 Ω
Offset Magnitude Change0 min, 1 typ, 25 max mV; ΔVOS
Power-Off Leakage Current±1 typ, ±10 max µA; VOUT=3.6 V or GND, VDD=0 V
Output Short Circuit Current-6 typ, -24 max mA; VOUT+ and VOUT−=0 V
Differential Output Short Circuit Current-5 typ, -12 max mA; VOD=0 V
Output Capacitance3 pF; COUT
Input High Voltage2.0 min, VDD max V; TTLIN
Input Low VoltageGND min, 0.8 max V; TTLIN
Input High Current±2 typ, ±10 max µA; VIN=3.3 V or 2.4 V
Input Low Current±1 typ, ±10 max µA; VIN=GND or 0.5 V
Input Clamp Voltage-1.5 min, -0.6 typ V; ICL=-18 mA
Input Capacitance3 pF; CIN
Power Supply Current No Load5 typ, 8 max mA; no load, VIN=VDD or GND
Power Supply Current Loaded7 typ, 10 max mA; RL=100 Ω, VIN=VDD or GND
Differential Propagation Delay High-to-Low0.3 min, 1.0 typ, 1.5 max ns; RL=100 Ω, CL=15 pF
Differential Propagation Delay Low-to-High0.3 min, 1.1 typ, 1.5 max ns; RL=100 Ω, CL=15 pF
Differential Pulse Skew0 min, 0.1 typ, 0.7 max ns; |tPHLD - tPLHD|
Differential Part-to-Part Skew0 min, 0.2 typ, 1.0 max ns; same VDD and within 5°C operating temperature range
Differential Part-to-Part Skew Across PVT0 min, 0.4 typ, 1.2 max ns; recommended operating temperature and voltage ranges, across process distribution
Transition Low-to-High Time0.2 min, 0.5 typ, 1.0 max ns; RL=100 Ω, CL=15 pF
Transition High-to-Low Time0.2 min, 0.5 typ, 1.0 max ns; RL=100 Ω, CL=15 pF
Maximum Operating Frequency200 min, 250 typ MHz; input tr=tf<1 ns, 50% duty cycle, 0 V to 3 V; output duty cycle 45%/55%, VOD>250 mV
Input PinPin 5, TTLIN; LVTTL/LVCMOS driver input pin, SOT-23 package
Non-Inverting Output PinPin 4, OUT+; SOT-23 package
Inverting Output PinPin 3, OUT−; SOT-23 package
Ground PinPin 2, GND; SOT-23 package
Power Supply PinPin 1, VDD; +3.3 V ±0.3 V, SOT-23 package
Datasheet Statusrequest_only

Product Overview

The DS90LV011A is a Texas Instruments single high-speed LVDS differential driver for Signal_Chain designs. It converts a TTLIN LVTTL/LVCMOS input into OUT+ and OUT− LVDS differential outputs and is specified as TIA/EIA-644-A compliant. The device is rated for greater than 400 Mbps switching rate and a 200 MHz switching frequency, with a maximum operating frequency specified at 200 MHz minimum and 250 MHz typical under stated input and output duty-cycle conditions.

The driver operates from a recommended VDD range of 3.0 V minimum, 3.3 V typical, and 3.6 V maximum. With a 100 Ω load, output differential voltage is specified from 250 mV to 450 mV, with 350 mV typical, and offset voltage is specified from 1.125 V to 1.375 V. Typical loaded supply current is 7 mA, with a 10 mA maximum.

The package is SOT-23 (DBV), 5 pins, with 1.45 mm maximum height and an approximate 3.0 x 1.75 mm body outline. Pin assignments are VDD on pin 1, GND on pin 2, OUT− on pin 3, OUT+ on pin 4, and TTLIN on pin 5. Applications include compact 3.3 V LVDS signaling, LVCMOS-to-LVDS signal conversion, and industrial-temperature differential interconnects.

Key Features

  • Single high-speed LVDS differential driver
  • TIA/EIA-644-A compliant interface operation
  • Greater than 400 Mbps switching rate
  • 200 MHz switching frequency specified
  • Typical ±350 mV differential signaling
  • 23 mW typical power dissipation at 3.3 V
  • Outputs enter TRI-STATE when powered off
  • Industrial -40 to +85 °C operation
  • 3.0 V to 3.6 V recommended supply
  • 5-pin SOT-23 DBV package

Typical Applications

  • LVCMOS-to-LVDS signal conversion
  • 3.3 V differential signaling links
  • Compact SOT-23 signal-chain boards
  • Industrial-temperature LVDS interfaces
  • 200 MHz differential driver circuits
  • TIA/EIA-644-A compliant outputs

Procurement Notes

When requesting a quote for DS90LV011A, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.

If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.

For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.

FAQ

What function does the DS90LV011A provide?

The DS90LV011A is a single high-speed LVDS differential driver from Texas Instruments. It accepts a TTLIN LVTTL/LVCMOS input and provides OUT+ and OUT− LVDS differential outputs in a 5-pin SOT-23 package.

What supply voltage is recommended for DS90LV011A operation?

The recommended VDD operating range is 3.0 V minimum, 3.3 V typical, and 3.6 V maximum. The VDD absolute maximum rating is -0.3 V to +4 V, so operating limits should remain within the recommended range.

What data-rate and frequency capability is specified?

The feature list specifies a switching rate greater than 400 Mbps and a 200 MHz switching frequency. The maximum operating frequency table lists 200 MHz minimum and 250 MHz typical under the stated input transition, duty-cycle, load, and VOD conditions.

What package and pinout does the DS90LV011A use?

The device uses a 5-pin SOT-23 DBV package. Pin 1 is VDD, pin 2 is GND, pin 3 is OUT−, pin 4 is OUT+, and pin 5 is TTLIN for the LVTTL/LVCMOS driver input.

Technical Review & Sourcing Note

Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.

This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.

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