Specifications
| Type | Description |
|---|---|
| Part Number | SN74LVC1G373 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Logic Function | Single D-type latch with 3-state output; positive logic; Q follows D when LE is high; Q latches D when LE is low; OE high forces Hi-Z output |
| Supply Voltage Range | 1.65-5.5 V; recommended operating supply voltage |
| Data Retention Supply Voltage | 1.5 V min; data retention only |
| Input Voltage Tolerance | Up to 5.5 V; inputs accept voltages to 5.5 V |
| High-Level Input Voltage | 0.65 x VCC min, 5.5 V max; VCC = 1.65 V to 1.95 V |
| High-Level Input Voltage | 1.7 V min, 5.5 V max; VCC = 2.3 V to 2.7 V |
| High-Level Input Voltage | 2.0 V min, 5.5 V max; VCC = 3.0 V to 3.6 V |
| High-Level Input Voltage | 0.7 x VCC min, 5.5 V max; VCC = 4.5 V to 5.5 V |
| Low-Level Input Voltage | 0 to 0.35 x VCC V; VCC = 1.65 V to 1.95 V |
| Low-Level Input Voltage | 0 to 0.7 V; VCC = 2.3 V to 2.7 V |
| Low-Level Input Voltage | 0 to 0.8 V; VCC = 3.0 V to 3.6 V |
| Low-Level Input Voltage | 0 to 0.3 x VCC V; VCC = 4.5 V to 5.5 V |
| Output Voltage Range | 0 to VCC V; recommended operating condition |
| High-Level Output Current | -4 mA; VCC = 1.65 V |
| High-Level Output Current | -8 mA; VCC = 2.3 V |
| High-Level Output Current | -16 mA and -24 mA; VCC = 3.0 V |
| High-Level Output Current | -32 mA; VCC = 4.5 V |
| Low-Level Output Current | 4 mA; VCC = 1.65 V |
| Low-Level Output Current | 8 mA; VCC = 2.3 V |
| Low-Level Output Current | 16 mA and 24 mA; VCC = 3.0 V |
| Low-Level Output Current | 32 mA; VCC = 4.5 V |
| Input Transition Rise or Fall Rate | 20 ns/V max; VCC = 1.8 V ±0.15 V or 2.5 V ±0.2 V |
| Input Transition Rise or Fall Rate | 10 ns/V max; VCC = 3.3 V ±0.3 V |
| Input Transition Rise or Fall Rate | 5 ns/V max; VCC = 5 V ±0.5 V |
| Operating Free-Air Temperature | -40 to 85 °C; DSBGA package |
| Operating Free-Air Temperature | -40 to 125 °C; all other packages |
| Supply Current | 10 uA max; VI = 5.5 V or GND, IO = 0, VCC = 1.65 V to 5.5 V |
| Power-Off Leakage Current | ±10 uA max; VI or VO = 5.5 V, VCC = 0 V |
| Input Leakage Current | ±1 uA max; VI = 5.5 V or GND, VCC = 0 V to 5.5 V |
| High-Impedance Output Leakage Current | ±5 uA max; VO = 0 to 5.5 V, VCC = 3.6 V |
| High-Level Output Voltage | VCC - 0.1 V min; IOH = -100 uA, VCC = 1.65 V to 5.5 V |
| High-Level Output Voltage | 1.2 V min; IOH = -4 mA, VCC = 1.65 V |
| High-Level Output Voltage | 1.9 V min; IOH = -8 mA, VCC = 2.3 V |
| High-Level Output Voltage | 2.4 V min; 2.3 V min; VCC = 3 V, IOH = -16 mA; IOH = -24 mA |
| High-Level Output Voltage | 3.8 V min; IOH = -32 mA, VCC = 4.5 V |
| Low-Level Output Voltage | 0.1 V max; IOL = 100 uA, VCC = 1.65 V to 5.5 V |
| Low-Level Output Voltage | 0.45 V max; IOL = 4 mA, VCC = 1.65 V |
| Low-Level Output Voltage | 0.3 V max; IOL = 8 mA, VCC = 2.3 V |
| Low-Level Output Voltage | 0.4 V max; 0.55 V max at -40 to 85 °C; 0.65 V max at -40 to 125 °C; VCC = 3 V, IOL = 16 mA or 24 mA |
| Low-Level Output Voltage | 0.55 V max at -40 to 85 °C; 0.65 V max at -40 to 125 °C; IOL = 32 mA, VCC = 4.5 V |
| Input Capacitance | 3.5 pF typ; VI = VCC or GND, TA = -40 to 85 °C, VCC = 3.3 V |
| Output Capacitance | 6 pF typ; VO = VCC or GND, TA = -40 to 85 °C, VCC = 3.3 V |
| Maximum Propagation Delay | 4 ns max; VCC = 3.3 V ±0.3 V, CL = 15 pF, D or LE to Q, TA = -40 to 85 °C |
| Timing Requirement | 3 ns min; LE high pulse duration, TA = -40 to 85 °C and -40 to 125 °C |
| Setup Time | 1.5 ns min; data before LE falling edge, VCC = 3.3 V ±0.3 V or 5 V ±0.5 V |
| Hold Time | 1.5 ns min; data after LE falling edge, VCC = 2.5 V ±0.2 V, 3.3 V ±0.3 V, or 5 V ±0.5 V |
| Output Enable Time | 1 to 4 ns; OE to Q, VCC = 3.3 V ±0.3 V, CL = 15 pF, TA = -40 to 85 °C |
| Output Disable Time | 1 to 7.9 ns; OE to Q, VCC = 3.3 V ±0.3 V, CL = 15 pF, TA = -40 to 85 °C |
| ESD Rating HBM | ±2000 V; human-body model per ANSI/ESDA/JEDEC JS-001 |
| ESD Rating CDM | ±1500 V; charged-device model per JEDEC JESD22-C101; CDM tested on DBV package |
| Absolute Maximum Supply Voltage | -0.5 to 6.5 V; over operating free-air temperature range |
| Absolute Maximum Input Voltage | -0.5 to 6.5 V; over operating free-air temperature range |
| Absolute Maximum Continuous Output Current | ±50 mA; over operating free-air temperature range |
| Latch-Up Performance | Exceeds 100 mA; per JESD78, Class II |
| Datasheet Status | request_only |
Product Overview
SN74LVC1G373 is a Texas Instruments single D-type latch in the Signal_Chain category. In positive logic operation, Q follows D while LE is high, and Q latches D when LE is low. The OE input controls the 3-state output; when OE is high, the output is forced to Hi-Z.
The device supports a recommended VCC range of 1.65-5.5 V, with 1.5 V minimum supply for data retention only. Inputs accept voltages up to 5.5 V, and recommended output voltage range is 0 to VCC. At 3.3 V ±0.3 V and 15 pF load, D or LE to Q propagation delay is specified up to 4 ns over -40 to 85 °C.
Package options include SOT-23-6 at 2.90 mm x 1.60 mm, SC70-6 at 2.00 mm x 1.25 mm, and DSBGA-6 at 1.41 mm x 0.91 mm. Operating free-air temperature is -40 to 85 °C for DSBGA and -40 to 125 °C for all other packages.
Key Features
- Single D-type latch with 3-state output
- Positive logic with LE-controlled data latching
- OE high places output in Hi-Z state
- 1.65-5.5 V recommended supply range
- Inputs tolerate voltages up to 5.5 V
- 1.5 V minimum supply for data retention
- 4 ns maximum propagation delay at 3.3 V
- 10 uA maximum supply current
- ±10 uA maximum power-off leakage current
- SOT-23-6, SC70-6, and DSBGA-6 packages
Typical Applications
- LE-controlled data storage
- 3-state signal gating
- Logic-level signal buffering
- Bus isolation using Hi-Z output
- Low-voltage digital interfaces
- Data retention logic nodes
Procurement Notes
When requesting a quote for SN74LVC1G373, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What logic function does SN74LVC1G373 provide?
SN74LVC1G373 is a single D-type latch with a 3-state output. In positive logic operation, Q follows D while LE is high, Q latches D when LE is low, and a high OE input forces the output to Hi-Z.
What supply voltage range is recommended for SN74LVC1G373?
The recommended operating supply voltage range is 1.65-5.5 V. For data retention only, the extracted datasheet facts specify a 1.5 V minimum supply voltage.
Which packages are listed for SN74LVC1G373?
The listed package options are SOT-23-6 measuring 2.90 mm x 1.60 mm, SC70-6 measuring 2.00 mm x 1.25 mm, and DSBGA-6 measuring 1.41 mm x 0.91 mm.
What timing parameters are specified at 3.3 V operation?
At VCC = 3.3 V ±0.3 V and CL = 15 pF, D or LE to Q propagation delay is 4 ns maximum over -40 to 85 °C. OE to Q enable time is 1 to 4 ns, and disable time is 1 to 7.9 ns.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.