Specifications
| Type | Description |
|---|---|
| Part Number | UCC27282 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | SON10 3 mm x 3 mm; SOIC8 6 mm x 5 mm; SON8 4 mm x 4 mm; SON10 4 mm x 4 mm |
| Driver Configuration | High-side and low-side driver for two N-channel MOSFETs; half-bridge or synchronous buck configurations |
| Maximum Switch Node Voltage Rating | 100 V; HS pin rating described in device description |
| Peak Output Current | ±3 A; HO and LO gate driver outputs |
| Typical Propagation Delay | 16 ns; feature specification |
| Rise Time | 12 ns; with 1.8-nF load |
| Fall Time | 10 ns; with 1.8-nF load |
| Typical Delay Matching | 1 ns; feature specification |
| Disabled Current Consumption | 7 µA; driver disabled |
| Bootstrap Diode | Integrated; internal bootstrap diode with external bootstrap capacitor required |
| Absolute Maximum Supply Voltage | -0.3 to 20 V; VDD with respect to VSS |
| Absolute Maximum Input Voltage | -5 to 20 V; EN, HI, and LI pins with respect to VSS |
| Absolute Maximum LO Output Voltage | -0.3 to VDD + 0.3 V; DC LO output voltage |
| Absolute Maximum LO Pulse Voltage | -2 to VDD + 0.3 V; LO pulses less than 100 ns |
| Absolute Maximum HO Output Voltage | VHS - 0.3 to VHB + 0.3 V; DC HO output voltage |
| Absolute Maximum HO Pulse Voltage | VHS - 2 to VHB + 0.3 V; HO pulses less than 100 ns |
| Absolute Maximum HS Voltage | -10 to 100 V; DC HS voltage |
| Absolute Maximum HS Pulse Voltage | -14 to 100 V; HS pulses less than 100 ns |
| Absolute Maximum HB Voltage | -0.3 to 120 V; HB pin with respect to VSS |
| Absolute Maximum HB-HS Voltage | -0.3 to 20 V; HB voltage with respect to HS |
| Absolute Maximum Operating Junction Temperature | -40 to 150 °C; TJ |
| Storage Temperature | -65 to 150 °C; Tstg |
| Lead Temperature | 300 °C; soldering, 10 seconds |
| ESD Rating HBM | ±2000 V; ANSI/ESDA/JEDEC JS-001; HS, HB, and HO rated 500 V HBM |
| ESD Rating CDM | ±1500 V; JEDEC JESD22-C101 |
| Recommended Supply Voltage | 5.5 V min, 12 V nom, 16 V max; VDD over operating free-air temperature range |
| Recommended Input Voltage | 0 to VDD + 0.3 V; EN, HI, and LI pins |
| Recommended Low-Side Output Voltage | 0 to VDD + 0.3 V; LO pin |
| Recommended High-Side Output Voltage | VHS to VHB + 0.3 V; HO pin |
| Recommended HS Voltage | -8 to 100 V; VHB-HS < 16 V |
| Recommended HS Pulse Voltage | -12 to 100 V; pulses less than 100 ns; VHB-HS < 16 V |
| Recommended HB Voltage | VHS + 5.5 to VHS + 16 V; HB pin operating voltage |
| HS Voltage Slew Rate | 50 V/ns; recommended operating condition |
| Recommended Operating Junction Temperature | -40 to 140 °C; TJ |
| Junction-to-Ambient Thermal Resistance | 118.3 °C/W; D package, 8 pins |
| Junction-to-Ambient Thermal Resistance | 47.3 °C/W; DRC package, 10 pins |
| VDD Quiescent Current | 0.3 mA typ, 0.4 mA max; VLI = VHI = 0 |
| VDD Operating Current | 2.2 mA typ, 4.5 mA max; f = 500 kHz, CLOAD = 0 |
| HB Quiescent Current | 0.2 mA typ, 0.4 mA max; VLI = VHI = 0 V |
| HB Operating Current | 2.5 mA typ, 4 mA max; f = 500 kHz, CLOAD = 0 |
| HB to VSS Quiescent Current | 5.0 µA typ, 50 µA max; VHS = VHB = 100 V |
| HB to VSS Operating Current | 0.1 mA typ; f = 500 kHz, CLOAD = 0 |
| Disabled VDD Current | 7.0 µA typ; VEN = 0 V |
| Input Rising Threshold | 1.9 V min, 2.1 V typ, 2.4 V max; HI and LI input threshold |
| Input Falling Threshold | 0.9 V min, 1.1 V typ, 1.3 V max; HI and LI input threshold |
| Input Voltage Hysteresis | 1.0 V typ; HI and LI inputs |
| Input Pulldown Resistance | 100 kΩ min, 250 kΩ typ, 350 kΩ max; HI and LI inputs |
| EN Enable Threshold | 1.54 V min, 2.0 V max; voltage threshold on EN pin to enable driver |
| EN Disable Threshold | 0.7 V min, 1.21 V max; voltage threshold on EN pin to disable driver |
| EN Pin Hysteresis | 0.3 V typ; enable pin |
| EN Internal Pulldown Resistor | 250 kΩ typ; enable pin |
| Driver Enable Time | 18 µs typ; VEN = 2 V, EN pulled high |
| Driver Disable Time | 1.5 µs typ; VEN = 0 V, EN pulled low |
| VDD UVLO Rising Threshold | 4.7 V min, 5.0 V typ, 5.4 V max; VDD undervoltage lockout |
| VDD UVLO Falling Threshold | 4.2 V min, 4.5 V typ, 4.9 V max; VDD undervoltage lockout |
| VDD UVLO Hysteresis | 0.5 V typ; VDD undervoltage lockout |
| HB UVLO Rising Threshold | 3.3 V min, 3.7 V typ, 4.4 V max; HB with respect to HS pin |
| HB UVLO Falling Threshold | 3.0 V min, 3.3 V typ, 4.1 V max; HB with respect to HS pin |
| HB UVLO Hysteresis | 0.3 V typ; HB undervoltage lockout |
| Bootstrap Diode Low-Current Forward Voltage | 0.55 V typ, 0.85 V max; IVDD-HB = 100 µA |
| Bootstrap Diode High-Current Forward Voltage | 0.88 V typ, 1.0 V max; IVDD-HB = 80 mA |
| Bootstrap Diode Dynamic Resistance | 1.5 Ω typ, 2.5 Ω max; ΔVF/ΔI, IVDD-HB = 100 mA and 80 mA |
| LO Low-Level Output Voltage | 0.085 V typ, 0.4 V max; ILO = 100 mA |
| LO High-Level Output Voltage Drop | 0.13 V typ, 0.42 V max; ILO = -100 mA, VLO = VDD - VLOH |
| LO Peak Pullup Current | 3.0 A typ; VLO = 0 V |
| Datasheet Status | request_only |
Product Overview
The UCC27282 is a Texas Instruments half-bridge MOSFET gate driver in the Power_Management category. It provides high-side and low-side drive for two N-channel MOSFETs in half-bridge or synchronous buck configurations. The HS pin is described with a 100 V switch-node voltage rating, while the HO and LO outputs provide ±3 A peak gate-drive current.
Timing parameters include 16 ns typical propagation delay, 12 ns rise time with a 1.8-nF load, 10 ns fall time with a 1.8-nF load, and 1 ns typical delay matching. The driver includes an internal bootstrap diode; an external bootstrap capacitor is required.
Operating recommendations specify VDD from 5.5 V minimum to 16 V maximum with 12 V nominal, HS operation from -8 V to 100 V when VHB-HS is below 16 V, and an HS slew-rate condition of 50 V/ns. Package choices include SON10 3 mm x 3 mm, SOIC8 6 mm x 5 mm, SON8 4 mm x 4 mm, and SON10 4 mm x 4 mm.
Key Features
- High-side and low-side drive for two N-channel MOSFETs
- Supports half-bridge and synchronous buck configurations
- 100 V maximum switch-node rating on HS pin
- ±3 A peak current from HO and LO outputs
- 16 ns typical propagation delay
- 12 ns rise and 10 ns fall with 1.8-nF load
- 1 ns typical delay matching
- 7 µA typical disabled current consumption
- Integrated bootstrap diode with external capacitor required
- Recommended VDD range is 5.5 V to 16 V
- HS recommended range is -8 V to 100 V
- VDD and HB undervoltage lockout thresholds specified
Typical Applications
- Half-bridge power stages
- Synchronous buck configurations
- Two N-channel MOSFET gate drive
- High-side and low-side switching
- Bootstrap-supplied high-side drive
Procurement Notes
When requesting a quote for UCC27282, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What type of driver is the UCC27282?
The UCC27282 is a Texas Instruments half-bridge MOSFET gate driver. It drives high-side and low-side positions for two N-channel MOSFETs in half-bridge or synchronous buck configurations.
What switch-node voltage does the UCC27282 support?
The extracted datasheet facts describe a 100 V maximum switch-node voltage rating for the HS pin. Recommended HS operation is -8 V to 100 V when VHB-HS is less than 16 V.
What are the main timing specifications for UCC27282?
The device has 16 ns typical propagation delay and 1 ns typical delay matching. With a 1.8-nF load, the listed rise time is 12 ns and the fall time is 10 ns.
Does UCC27282 include a bootstrap diode?
Yes. The extracted facts state that the bootstrap diode is integrated. The same fact also notes that an external bootstrap capacitor is required for the bootstrap supply arrangement.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.