Specifications
| Type | Description |
|---|---|
| Part Number | UCC27289 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package Case | SOIC8 (6 mm x 5 mm), SON10 (3 mm x 3 mm), SON8 (4 mm x 4 mm), SON10 (4 mm x 4 mm) |
| Inferred Category | Power_Management |
| Component Type | Power_IC |
| Driver Configuration | High-side and low-side driver for two N-channel MOSFETs; half-bridge or synchronous buck topologies |
| Maximum Switch Node Voltage Rating | 100 V; HS pin rating in description |
| Peak Output Current | ±3 A; source and sink gate-drive current |
| Typical Propagation Delay | 16 ns; feature summary |
| Typical Delay Matching | 1 ns; feature summary |
| Rise Time | 12 ns typ; 1800-pF load |
| Fall Time | 10 ns typ; 1800-pF load |
| Integrated Bootstrap Diode Rating | 100 V; integrated bootstrap diode |
| Typical Undervoltage Lockout | 8 V; feature summary |
| Absolute Maximum VDD Supply Voltage | -0.3 to 20 V; with respect to VSS |
| Absolute Maximum Input Voltage | -5 to 20 V; EN, HI, and LI pins, with respect to VSS |
| Absolute Maximum LO Output Voltage | -0.3 to VDD + 0.3 V DC; -2 to VDD + 0.3 V for pulses <100 ns |
| Absolute Maximum HO Output Voltage | VHS - 0.3 to VHB + 0.3 V DC; VHS - 2 to VHB + 0.3 V for pulses <100 ns |
| Absolute Maximum HS Voltage | -10 to 100 V DC; -14 to 100 V for pulses <100 ns |
| Absolute Maximum HB Voltage | -0.3 to 120 V; HB pin voltage with respect to VSS |
| Absolute Maximum HB-HS Voltage | -0.3 to 20 V; HB voltage with respect to HS |
| Absolute Maximum Operating Junction Temperature | -40 to 150 °C; TJ |
| Storage Temperature | -65 to 150 °C; Tstg |
| ESD Rating HBM | ±2000 V; ANSI/ESDA/JEDEC JS-001; HS, HB, and HO rated 500 V HBM |
| ESD Rating CDM | ±1500 V; JEDEC JESD22-C101 |
| Recommended VDD Supply Voltage | 8 V min, 12 V nom, 16 V max; operating free-air temperature range |
| Recommended Input Voltage | 0 to VDD; EN, HI, and LI pins |
| Recommended LO Output Voltage | 0 to VDD; low-side output voltage |
| Recommended HO Output Voltage | VHS to VHB; high-side output voltage |
| Recommended HS Voltage | -8 to 100 V DC; -12 to 100 V for pulses <100 ns; VHB-HS < 16 V |
| Recommended HB Voltage | VHS + 8 V to VHS + 16 V; bootstrap supply voltage |
| Recommended HS Slew Rate | 50 V/ns max; voltage slew rate on HS |
| Recommended Operating Junction Temperature | -40 to 140 °C; TJ |
| Junction-to-Ambient Thermal Resistance | 47.3 °C/W DRC, 43.3 °C/W DRM, 43.0 °C/W DPR, 118.3 °C/W D; RθJA |
| VDD Quiescent Current | 0.36 mA typ, 0.45 mA max; VLI = VHI = 0 V, VDD = VEN = VHB = 12 V, VHS = VSS = 0 V, no load, TJ = -40°C to 140°C |
| VDD Operating Current | 2.2 mA typ, 4.5 mA max; f = 500 kHz, CLOAD = 0 |
| HB Quiescent Current | 0.2 mA typ, 0.4 mA max; VLI = VHI = 0 V |
| HB Operating Current | 2.5 mA typ, 4 mA max; f = 500 kHz, CLOAD = 0 |
| Disabled VDD Current | 7.0 µA typ; VEN = 0 V |
| EN Enable Threshold | 1.54 V min, 2.0 V max; voltage threshold on EN pin to enable driver |
| EN Disable Threshold | 0.7 V min, 1.21 V max; voltage threshold on EN pin to disable driver |
| Input Rising Threshold | 1.9 V min, 2.1 V typ, 2.4 V max; HI and LI inputs |
| Input Falling Threshold | 0.9 V min, 1.1 V typ, 1.3 V max; HI and LI inputs |
| VDD UVLO Rising Threshold | 6.5 V min, 7.0 V typ, 7.8 V max; VDD rising threshold |
| VDD UVLO Falling Threshold | 5.7 V min, 6.5 V typ, 7.3 V max; VDD falling threshold |
| HB UVLO Rising Threshold | 5.5 V min, 6.3 V typ, 7.1 V max; HB rising threshold with respect to HS |
| HB UVLO Falling Threshold | 5.0 V min, 5.8 V typ, 6.6 V max; HB falling threshold with respect to HS |
| Bootstrap Diode Forward Voltage | 0.65 V typ, 0.85 V max; IVDD-HB = 100 µA |
| Bootstrap Diode High-Current Forward Voltage | 0.85 V typ, 1.0 V max; IVDD-HB = 80 mA |
| Bootstrap Diode Dynamic Resistance | 1.5 Ω typ, 2.5 Ω max; ΔVF/ΔI, IVDD-HB = 100 mA and 80 mA |
| LO Low-Level Output Voltage | 0.085 V typ, 0.4 V max; ILO = 100 mA |
| LO High-Level Output Voltage Drop | 0.13 V typ, 0.42 V max; ILO = -100 mA, VLOH = VDD - VLO |
| LO Peak Pullup Current | 3.0 A typ; VLO = 0 V; not production tested |
| LO Peak Pulldown Current | 3.0 A typ; VLO = 12 V; not production tested |
| HO Low-Level Output Voltage | 0.1 V typ, 0.4 V max; IHO = 100 mA |
| HO High-Level Output Voltage Drop | 0.13 V typ, 0.42 V max; IHO = -100 mA, VHOH = VHB - VHO |
| HO Peak Pullup Current | 3.0 A typ; VHO = 0 V; not production tested |
| HO Peak Pulldown Current | 3.0 A typ; VHO = 12 V; not production tested |
| Propagation Delay LI Falling to LO Falling | 16 ns typ, 30 ns max; see Figure 6-1 |
| Propagation Delay HI Falling to HO Falling | 16 ns typ, 30 ns max; see Figure 6-1 |
| Propagation Delay LI Rising to LO Rising | 16 ns typ, 30 ns max; see Figure 6-1 |
| Propagation Delay HI Rising to HO Rising | 16 ns typ, 30 ns max; see Figure 6-1 |
| Delay Matching LO On to HO Off | 1 ns typ, 7 ns max; see Figure 6-1 |
| Delay Matching LO Off to HO On | 1 ns typ, 7 ns max; see Figure 6-1 |
| Output Rise Time | 12 ns typ; LO and HO, CLOAD = 1800 pF, 10% to 90% |
| Datasheet Status | request_only |
Product Overview
The UCC27289 is a Texas Instruments half-bridge MOSFET gate driver for two N-channel MOSFETs. Its high-side and low-side driver structure supports half-bridge and synchronous buck topologies, with the HS pin rated to 100 V and the integrated bootstrap diode also rated to 100 V.
Gate-drive performance is specified with ±3 A peak source and sink current. Timing parameters include 16 ns typical propagation delay, 1 ns typical delay matching, 12 ns typical rise time, and 10 ns typical fall time with an 1800-pF load. The device includes undervoltage lockout behavior, with a typical feature-summary UVLO value of 8 V and detailed VDD and HB UVLO thresholds specified in the electrical characteristics.
Recommended operation uses an 8 V to 16 V VDD supply, with 12 V nominal. The device supports EN, HI, and LI input voltages from 0 to VDD, low-side output voltage from 0 to VDD, and high-side output voltage from VHS to VHB. Package options include SOIC8, SON10, SON8, and SON10 formats.
Key Features
- High-side and low-side driver for two N-channel MOSFETs
- 100 V maximum HS switch-node voltage rating
- ±3 A peak source and sink gate-drive current
- 16 ns typical propagation delay across driver paths
- 1 ns typical delay matching between outputs
- 12 ns typical rise time with 1800-pF load
- 10 ns typical fall time with 1800-pF load
- Integrated 100 V bootstrap diode
- 8 V typical undervoltage lockout feature
- 50 V/ns maximum recommended HS slew rate
Typical Applications
- Half-bridge MOSFET drive
- Synchronous buck topologies
- High-side N-channel MOSFET drive
- Low-side N-channel MOSFET drive
- 100 V switch-node power stages
- Bootstrap-supplied high-side gate drive
Procurement Notes
When requesting a quote for UCC27289, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What type of driver is the UCC27289?
The UCC27289 is a Texas Instruments half-bridge MOSFET gate driver. It provides high-side and low-side drive for two N-channel MOSFETs in half-bridge or synchronous buck topologies.
What switch-node voltage does the UCC27289 support?
The HS pin is rated for a 100 V maximum switch-node voltage. Recommended HS operation is -8 to 100 V DC, or -12 to 100 V for pulses shorter than 100 ns when VHB-HS is below 16 V.
What gate-drive current is specified for UCC27289?
The device specifies ±3 A peak output current for gate-drive source and sink operation. LO and HO peak pullup and pulldown currents are each listed as 3.0 A typical under the stated output-voltage conditions.
What supply range is recommended for UCC27289 VDD?
The recommended VDD supply range is 8 V minimum, 12 V nominal, and 16 V maximum. The absolute maximum VDD supply voltage is -0.3 to 20 V with respect to VSS.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.